# HP ADS 1.5 User-defined Models User Manual

Brand: HP, Pages: 216, PDF Size: 1.33 MB

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6-16 The Frequency-Domain Defined Device

Custom Modeling with Frequency-Domain Defined Devices

Trigger Events

The FDD enables you to define trigger events. Up to 31 triggers can be defined.

Anytime the value of the trigger expression is equal to a number other than zero, a

trigger event is declared for the corresponding trigger. Each trigger keeps a count of

the number times the trigger occurred and the time of its last trigger. The trigger

time is defined as the time value of the current simulation point plus the value of the

expression. Therefore the value of the expression should normally be the time of the

trigger relative to the current time value. The value of this trigger expression should

be limited to -timestep and -2*timestep. This is explained further in the section

“Accessing Port Variables at Trigger Events” on page 6-18.

Three built-in functions have been defined to provide access to trigger information,

they are described in Table 6-3. Again, the underscore is used as part of the name,

signifying that these functions only have meaning within the context of an FDD

instance, and are not valid elsewhere.

Another function is available to detect threshold crossings and to generate the proper

trigger expression values, which is shown in Ta b l e 6 - 4. Note that the threshold

crossings are based only on the DC (baseband) spectral voltage at the specified port.

The actual time crossing is computed based on linear interpolation between adjacent Table 6-3. Functions available to access trigger information

Name Description

_to(N) Returns 1 if trigger N occurred at this time point, else 0

_tn(N) Returns the accumulated number of trigger N events

_tt(N) Returns the absolute time in seconds of last trigger N event

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The Frequency-Domain Defined Device 6-17

time points, so the actual accuracy will depend on both the size of the time step and

the rate of change of the slope of the signal.

For a procedure on how to add trigger parameters to an FDD, refer to the section

“Defining Triggers” on page 6-26.

Output Clock Enables

Normally all of the FDD voltages and currents are re-evaluated at every time sample.

It is possible, though, to enable the output of a given port to change only when a

specified trigger, or a set of specified triggers, occurs. This is done using the clock

enable parameter, ce[n]=value. [n] specifies the port where the clock enable will be

applied. value is a binary value that is set using the bin() function, where the Nth bit

corresponds to whether this port should be enabled by the Nth trigger. For example, if

you want the output of port n to be updated whenever either trigger 1 or trigger 3

occur, you would enter a value of bin(101) or 5 for the clock enable parameter. Clock

enables can be used when it is necessary to update computed values only at certain

time points. Sample-and-holds are one obvious application, refer to the example in

the section “Sample and Hold” on page 6-34.

For a procedure on how to add clock enable parameters to an FDD, refer to the

section “Defining Clock Enables” on page 6-27. Table 6-4. Function to generate a trigger event

Name Description

_xcross(P, Vthresh, direction) Returns 0 if no threshold crossing occurred,

otherwise returns its relative time, a value

between

(-1 and -2)*timestep. A threshold

crossing occurs if the baseband voltage at port

P passes through the value Vthresh in the

specified direction. A positive direction number

implies a positive edge; a negate number a

negative edge; a direction number of 0 implies

either positive or negative edge. No hysteresis

exists.

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6-18 The Frequency-Domain Defined Device

Custom Modeling with Frequency-Domain Defined Devices

Accessing Port Variables at Trigger Events

Now that it is possible to generate trigger events at threshold crossings, it is

desirable to be able to determine the spectral port voltages and currents at the point

in time that this trigger occurred. Linear magnitude and phase interpolation is used

to compute values at times between adjacent simulator time points, and again, the

accuracy depends on the rate of change of the input envelope waveform. The four

functions that are used to do this are described in Table 6-5.

The _sv_e() function is very similar to _sv_d(), which is described in Ta b l e 6 - 2. By

default, though, past history for the _sv_e() function is only saved for the last 2

timesteps. Therefore, the event they refer to must have just occurred, and cannot

delay back an arbitrary amount of time. If a triggered voltage value is desired at a

much later point in time, then it should be sampled and held using a combination of

the above functions and the clock enable previously discussed.

All of the spectral port variable functions discussed so far return only the complex

value of the single specified envelope. (If the indices are 0, then the real baseband

value is returned.) The broadband functions _sv_bb() and _si_bb() functions, though,

perform an inverse Fourier transform of all of the spectral voltages or currents at the

specified event time, and return the real value. Note that if this value is computed at

every time step, it will generate an aliased, undersampled waveform, since the time

step in Circuit Envelope is typically much less than the period of the various envelope

center frequencies.Table 6-5. Functions to access port variables at trigger events

Name Description

_sv_e(P,N,indices) Return the port P spectral voltage envelope at the last

trigger N time

_si_e(P,N,indices) Return the port P spectral current envelope at the last

trigger N time

_sv_bb(P,N) Return the total, real voltage of port P at the last

trigger N time

_si_bb(P,N) Return the total, real current entering port P at the last

trigger N time

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The Frequency-Domain Defined Device 6-19

Delaying the Carrier and the Envelope

With exception of the _sv_bb() and _si_bb() functions, all of the other spectral port

variable functions return the envelope information. This is true even with the

delayed and event versions. If it is necessary to delay both the envelope and the

carrier, then an additional term must be added to account for the carrier phase shift.

For example, if the fundamental signal is

Vk(t)*exp(j*2*pi*fc*t)

then

i[2,1]=_sv_d(1,1usec,1)

generates a current equal to

Vk(t-1msec)*exp(j*2*pi*fc*t)

To generate a true coherent delay with the FDD, you would have to modify the

equation to

i[2,1]=_sv_d(1,1usec,1)*exp(-j*2*pi*fc*1usec)

or to something similar. Of course, if only a fixed delay is desired, there are linear

elements that are more suitable for this application than the FDD.

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6-20 The Frequency-Domain Defined Device

Custom Modeling with Frequency-Domain Defined Devices

Miscellaneous FDD Functions

There are three remaining functions that are available in the FDD for time-domain

operations, and are described in Table 6-6. They were incorporated into the FDD

because they required that state history be maintained. The functions correspond to

a basic counter and to a linear feedback shift register. These functions are valid only

when used in an FDD.

Table 6-6. Miscellaneous FDD Functions

Name Description

_divn(T,N,N0), Returns the value of a counter, clocked every

time trigger

T occurs, decrementing from N to

0. N0 is initial time = 0 value.

_lfsr(T, seed,taps) Returns the value of a linear feed back shift

register that is clocked every trigger

T. seed is

the initial value of the register.

taps are the

binary weights of the bits that are fed back

using modulo 2 math.

_shift_reg(T,M, N, In) Returns the value of a multi-mode shift register

that is clocked every trigger

T, has N bits, and

with an input equal to In.

M = 0: LSB first, Serial In, Parallel Out

M = 1; MSB first, Serial In, Parallel Out

M = 2; LSB first, Parallel In, Serial Out

M = 3; MSB first, Parallel In, Serial Out